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nathaliecoupet at yahoo.com
Thu Dec 19 15:25:27 UTC 2013
Good morning jfc,
Could you please help me understand how shared memory or an interprocess communication mechanism of some kind, HDLC, VDH, any other line control procedure, or inter-computer buss mechanisms work?
See below an extract from IEN 48.
[...] The physical interface between directly connected gateway halves is of no special importance. For monolithic gateways, it is typically shared memory or an interprocess communication mechanism of some kind; for distinct gateway halves, it might be HDLC, VDH, any other line control procedure, or inter-computer buss mechanism.
Could you recommend books and/or other resources?
Thank you so much for all your help.
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